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Wanlass's CMOS Patent

Wanlass's CMOS Patent

Image creditFrank M. Wanlass, U.S. Patent 3,356,858
Public domain (U.S. patent drawing) ↗

Wanlass's CMOS Patent

Year
1963
Creator
Frank Wanlass, Chih-Tang Sah
Company
Fairchild Semiconductor
Location
Fairchild R&D Laboratory, Palo Alto, California

Description

U.S. Patent 3,356,858 pairs p-channel and n-channel MOS transistors, so a logic circuit uses almost no power when it is idle. Fairchild filed it on June 18, 1963, and the Patent Office issued it on December 5, 1967.

Importance

Frank Wanlass and Chih-Tang Sah of Fairchild described the idea at a conference in February 1963. The first large markets for CMOS were battery products such as digital watches. Today CMOS is the main technology that companies use to make chips.

Interesting fact

Wanlass and Sah called their 1963 paper Nanowatt Logic, and the patent gives a standby power of less than 10 nanowatts for each node.

Sources

  1. 1963: Complementary MOS Circuit Configuration is Invented ↗Computer History Museum, The Silicon Engine · 2007
  2. US Patent 3,356,858, Low stand-by power complementary field effect circuitry ↗Google Patents · 1967-12-05
  3. Nanowatt Logic Using Field-Effect Metal-Oxide Semiconductor Triodes (F. M. Wanlass and C. T. Sah), ISSCC 1963 Digest of Technical Papers, pp. 32-33 ↗IEEE · 1963-02-20